In the late 1970's I designed a "Ski-Timer" requiring the same accuracy and stability.  I used a J-FET Pierce oscillator where I placed the crystal, J-FET transistor, and temperature sensing thermistor in an "oven" I created out of a number of under-rated power resistors surrounding them. I used a separate 60 Hz oscillator to generate a string of heating pulses whose duty cycle was controlled by the thermistor,- keeping the oven temperature within 0.01°C of the desired 25°C.  All the ICs in that counter were of the 54 military grade TTL series instead of the 74 commercial grade TTL series.  My two biggest head-aches in that design were in getting the count's starting signal to the counter from the top of the ski run, and in preventing automobile headlights from a nearby highway from swamping my infrared frequency- modulated light beam used for the photo finish. After solving those problems, that counter functioned very well.

The oven for this counter's oscillator doesn't need to be anywhere near as robust as the one I designed above. The starting signal has no transmitting difficulties, and there is nothing to interfere with the stopping signal - making the design of this counter much easier.  I have also used a crystal with a 74HC04 Hex Inverter in a ring-of-three configuration for a compact oscillator in a data logger I designed for a multi-stage solid fuel rocket.

Another approach would be to use a Voltage Controlled Oscillator, or VCO,  Here the VCO's output is split in two, with one branch as the final output while the other branch is divided down to a lower frequency that is in phase with that of a stable reference oscillator.   Both oscillators' outputs are fed to a Phase-Locked-Loop, or PLL, where if the two frequencies are still in phase, nothing further is done. If the phase of both oscillators differs, the PLL develops an error voltage that opposes the VCO's drift, which is then applied to the VCO bringing the VCO back on track.

Here there are two kinds of PLL ICs to be considered: Analog, with an error voltage output that can be directly applied to the VCO, and Digital,- with a digital output that requires a Digital to Analog Converter, or DAC, to produce the error voltage for the VCO.  Note: the bit-depth of both the digital PPL and DAC determines the accuracy of the error voltage, ie. 8 bits improves the results over 7 bits.

In some applications, the reference oscillator is an atomic clock located in a GPS satellite.  The satellite broadcasts a stable 1 Hz signal accurate to better than 1 part per billion.  As my application only requires an accuracy of 1 part per 10,000; attaining and conditioning the satallite's signal would be expensive overkill.

One more thing about Phase Locked Loops: Properly used, they are not redundant.  You are not using one crystal controlled frequency to stabalize another frequency you could have stabalized using a different crystal. The VCO is used to produce a frequency for which there is no crystal on the market.

The PLL takes advantage of the fact that all frequencies are divisible by themselves, producing a frequency of one unit measure. ie; You can always divide any given frequency in Megahertz down to a single Megahertz.  The PLL simply synchronizes the VCO's output with a 1 Megahertz crystall controlled oscillator.

When the VCO's output drifts off frequency it is no longer in synch with the crystal controlled reference oscillator, dropping out of phase with the reference oscillator.  The PLL detects this difference in phase, and develops an error voltage that alters the VCO's frequency in the opposite direction from the drift, bringing the VCO back to the frequency where it will be in synch again.

Sometimes the VCO frequency has a subharmonic frequency that is closer to its value for which there is a crystal on the market that can be used in a reference oscillator to synchronize with the VCO.  A reference oscillator like this can often shorten the the neccessary dividing chain.  There also are a number of multi-stage binary counter IC's that make it easier to divide a frequency down by large numbers.

The difference between the practical and theoretical counts may not be critical if it applies equally to all the capacitors under test.  That would produce mean counts that are all the same percentage higher than their calculated values for all the different capacitors.   I will be testing my breadboarded circuit for this condition shortly.

In testing the mean difference between the practical and theoretical counts of the 11 capacitors in my capacitor bank, I found a grand-mean difference of less than 18% between the practical and theoretical counts.  Unfortunately this included some differences that were wildly different,- making it still neccessary to design a better oscillator.

I will try to find a 1 KHz crystal to control my oscillator, which should improve my results dramatically.  If not, I will try to move the 'jitter' (uncertan digits denoted by an 'x' in frequencies mentioned in the previous page) to a less significant decimal place by using a 1 MHz crystal and dividing down to the desired 1 KHz.  Here I will not display the 3 least significant digits containing the jitter in my now 6 decimal place counter.   The 'Seconds' portion of my counter will have the same 5 digits as before, plus the three new hidden digits.

My local supplier was not able to provide me with either a 1 KHz or a 1 MHz crystal.  They did have a 2 MHz crystal which I wired up in a series-resonant Pierce Oscillator circuit with a 2.7 mH inductor, a 0.001 µf capacitor, a 0.01µf capacitor, a 10MΩ resistor, and an ECG312 Negative channel JFET transistor as shown below.  The crystal was rated at 2.0000 MHz and delivered 2.0000x MHz.  I knocked that down to 1.0000x MHz by using a 74C74 D-type Flip-Flop, and used a chain of three 74LS192 BCD counters to further divide this frequency down to 1.00007 KHz.

I used the CMOS version of the positive edge triggered flip-flop as it responds better to the lower voltages provided by the oscillator, and has enough of a fan-out to drive the first counter in the divider chain.

Note:  I used an LM7805 3-Terminal Voltage Regulator for the oscillator's divider chain ic's. This voltage regulator, and the Pierce oscillator were both powered by an 18V commercial step-down switching voltage regulator from the mains.  In a room that varied in temperature from 27.4°C at noon to 24.1°C at 9:45 PM, this oscillator has continued to produce 1.00007 KHz without a single hint of jitter or any drift in frequency.

I will allow it to run for a couple of days, periodically checking for any change in its apparent rock-steady output.  If there is no drift in the frequency, or jitter, my design is complete without the need for an oven.  Otherwise, I will need to design an oven to maintain the oscillator's stability.

However, the faster oscillator induced some harmonic oscillations into the breadboard's wiring.  This should be eliminated by the much shorter wiring and lead-dress on the actual circuit board, and by putting a 0.01µf bypass capacitor on the VCC pin of all 24 integrated circuits in the timer.

To appreciate the difference between my old and new oscillators, take another look at the last video:  Note the changing frequencies shown in the bottom right-hand corner of the oscilloscope's screen.  The frequency starts off at 1.00453 KHz and drifts through a number of values too fast to read before the falling voltage crosses the trip point cutting off the oscillator.  Freezing the video at varius points reveals the frequency climbed as high as 1.0084 KHz and only dropped as low as 1.00402 KHz.

Now look at the video below of the same circuit action.  Here I have concentrated the scope's view at the bottom of the gap between two pulses,- to show the the noise introduced by the inducted harmonics of the oscillator.  The 1.00007 KHz indicated here remains steady for the duration, and has remained steady for the last couple of days.  Note: the lowest frequency of the old oscillator was much higher than the only and best frequency of the new oscillator.

A couple of days have passed and there have been no changes in my oscillator's frequency and no drift at all.  Even after powering down and restarting a couple times.  An accuracy of 7/100ths of a millisecond is not great, but it is much better than the accuracy of a stop-watch.  Especially factoring in both the start and stop reaction times of the person using the stop-watch.

At this point I have a slight dilemma.  Do I: a) use my crystal controlled oscillator as a stable reference with its tiny error, or b) use it as is, without constructing a VCO tweaked to compensate for the tiny error.?

Keeping in mind the purpose of this counter, option "b" is best since the tiny error applies equally to all capacitors under test.  This consideration also allows me to forego a mode switch enhancement that would allow the user to switch between the human time readout (in hours, minutes, and seconds) and the accumulated millisecond readout without any early carry.

.

Obviously as long as it is used indoors, an oven isn't required,- making it time to reassemble this capacitor timer on permanent circuit boards mounted in a cabinet with the appropriate connectors for my Capacitor Bank, fusing, and a power receptical. Here is my progress to date.

Soon I will be able to replace my short, medium, and long "winks" and "blinks" in my movie's capacitance section with precise counts that compare the first 2/3 of all my capacitors' discharge times.  This device also shortens the time it takes to discharge very large capacitors while studying the behaviour of capacitors.  Here all the nitty-gritty work has been done to to extend its current range from a single millisecond to include days, years, and even decades.